SOC test: the devil is in the details of integration/implementation

In following the uproar and wide-spread talk about systems-on-a-chip (SOC) and its associated challenges, it is interesting to note that different people have varying notions and interpretations of SOC. It may be prudent to establish a base level definition of SOC. In the context of testing large multi-functional chips, SOC can be defined to be any chip that has more than 1 million gates and/or 1000+ package pins. Usually, such devices are single chip solutions that contain as many cores, memories and functional elements as is possible to fit in one die with a view to get the best price/ performance ratio as permitted by the latest technology.